The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2019

Filed:

Jan. 20, 2017
Applicant:

Megachips Corporation, Osaka, JP;

Inventor:

Hiroyuki Nakamura, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318536 (2013.01); G01R 31/3177 (2013.01); G01R 31/31707 (2013.01); G01R 31/318541 (2013.01); G01R 31/318572 (2013.01); G06F 17/5072 (2013.01); G06F 17/5077 (2013.01); G01R 31/318544 (2013.01); G01R 31/318555 (2013.01);
Abstract

A scan test circuit includes a scan chain formed of a plurality of sub-scan chains, an input distribution circuit, and an output compression circuit. With the use of a bypass circuit, a plurality of sub-scan chains are formed in a compression scan mode by connecting scan cell circuits of a high confidentiality-requiring circuit among a plurality of scan cell circuits included in an internal circuit, and a plurality of sub-scan chains are formed in a non-compression scan mode by bypassing the scan cell circuits of the high confidentiality-requiring circuit.


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Nakamura, Hiroyuki. (2019). Scan test circuit, scan test method, and method of designing scan test circuit (U.S. Patent No. 10215808). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10215808

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