The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

Oct. 30, 2017
Applicant:

Shanghai Zhaoxin Semiconductor Co., Ltd., Shanghai, CN;

Inventor:

Yeong-Sheng Lee, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/018 (2006.01); H03K 19/0185 (2006.01); H03K 5/24 (2006.01); H03K 17/687 (2006.01); H02M 3/158 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H03K 5/2481 (2013.01); H03K 17/6872 (2013.01); H02M 3/158 (2013.01); H03K 19/20 (2013.01);
Abstract

A low-voltage-drop rectifier circuit includes a first MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a second MOSFET, a comparator, and a level adjustment circuit. The first MOSFET has a gate terminal for receiving a control voltage, a source terminal connected to a connection node, a drain terminal connected to an input node, and a body terminal connected to the connection node. The second MOSFET has a gate terminal for receiving the control voltage, a source terminal connected to an output node, a drain terminal connected to the connection node, and a body terminal connected to the output node. The comparator generates a first comparison voltage and a second comparison voltage according to an input voltage at the input node and an output voltage at the output node. The level adjustment circuit generates and fine-tunes the control voltage according to the first comparison voltage and the second comparison voltage.


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