The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

Jul. 13, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

David F. Craddock, New Paltz, NY (US);

Matthias Klein, Wappingers Falls, NY (US);

Eric N. Lais, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/42 (2006.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01); G06F 12/0862 (2016.01);
U.S. Cl.
CPC ...
G06F 13/4291 (2013.01); G06F 12/0862 (2013.01); G06F 13/28 (2013.01); G06F 13/4022 (2013.01); G06F 2212/602 (2013.01);
Abstract

Embodiments include methods, systems, and computer program products for performing synchronous data I/O. Aspects include a processor of computer system sending a store block to request data from a device through a PCIe connection, requested data having a predetermined number of data blocks, and the processor executing a data transaction loop to retrieve requested data. Executing the data transaction loop may include writing to a table prefetch trigger register on host bridge to queue up speculative prefetches in ETU for each data block. The host bridge may perform a first speculative prefetch to install a device table entry in a device table cache. The processor may further perform a second speculative prefetch to install an address translation in an address translation cache. The host bridge processes the data block received through direct memory access over the PCIe connection using the prefetched device table entry and address translation.


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