The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

Mar. 15, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Steven G. Aden, Simpsonville, SC (US);

Clinton E. Bubb, Pleasant Valley, NY (US);

Michael Grassi, Shokan, NY (US);

Howard M. Haynie, Wappingers Falls, NY (US);

Raymond M. Higgs, Poughkeepsie, NY (US);

Luke M. Hopkins, Peterborough, NH (US);

Kirk Pospesel, Yorktown, NY (US);

Gabriel M. Tarr, Durham, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0813 (2016.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1642 (2013.01); G06F 13/1663 (2013.01); G06F 13/1668 (2013.01); G06F 12/0813 (2013.01);
Abstract

A system for managing one or more queues in a multi-processor environment includes a queue manager disposed in communication with a plurality of processors and a memory shared by the plurality of processors, and a queue configured to be controlled by the queue manager, the queue including independent and discrete queue elements and having a starting location specified by a base address, the queue manager having one or more dynamically configurable parameters, the one or more dynamically configurable parameters including a size of each of the queue elements. The queue manager is configured to perform receiving a message from a processor of the plurality of processors, the message including an operation address specifying a fixed storage location in the memory and a request related to accessing the memory, selecting the queue based on the operation address, and performing a queuing operation on the queue based on the request.


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