The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2019
Filed:
Nov. 16, 2016
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Ati Technologies Ulc, Markham, CA;
Meenakshi Sundaram Bhaskaran, San Diego, CA (US);
Elliot H. Mednick, Salem, NH (US);
David A. Roberts, Wellesley, MA (US);
Anthony Asaro, Toronto, CA;
Amin Farmahini-Farahani, Santa Clara, CA (US);
Advanced Micro Devices, Inc., Santa Clara, CA (US);
ATI Technologies ULC, Markham, CA;
Abstract
A system and method for reducing latencies of main memory data accesses are described. A non-blocking load (NBLD) instruction identifies an address of requested data and a subroutine. The subroutine includes instructions dependent on the requested data. A processing unit verifies that address translations are available for both the address and the subroutine. The processing unit continues processing instructions with no stalls caused by younger-in-program-order instructions waiting for the requested data. The non-blocking load unit performs a cache coherent data read request on behalf of the NBLD instruction and requests that the processing unit perform an asynchronous jump to the subroutine upon return of the requested data from lower-level memory.