The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

May. 13, 2015
Applicant:

Hitachi, Ltd., Tokyo, JP;

Inventors:

Masayuki Hayashi, Tokyo, JP;

Masayuki Gomyo, Tokyo, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 13/14 (2006.01); G06F 13/10 (2006.01); G06F 13/16 (2006.01); G06F 12/0831 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0604 (2013.01); G06F 12/0835 (2013.01); G06F 13/102 (2013.01); G06F 13/14 (2013.01); G06F 13/16 (2013.01);
Abstract

A computer has processors each including computation cores; memories, and an IO device, and includes NUMA nodes. The computer holds pattern management information to manage patterns and comprises a control module to determine a pattern to be applied to the computer. The pattern management information includes policy information including a policy on placement of a transfer-use memory area in the NUMA nodes, a policy on the placement of driver management information in the NUMA nodes, and a policy on allocation of computation cores that execute data transfer in the NUMA nodes, for each of the plurality of patterns. The control module applies each of the patterns to the computer based on the pattern management information, to measure IO performance in each of the patterns, and determine a pattern being highest in IO performance as a pattern to be applied to the computer.


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