The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Jul. 18, 2018
Applicant:

Teledyne Scientific & Imaging, Llc, Thousand Oaks, CA (US);

Inventors:

Mihail Milkov, Moorpark, CA (US);

Kyle LaFevre, Ventura, CA (US);

Assignee:

TELEDYNE SCIENTIFIC & IMAGING, LLC, Thousand Oaks, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03M 1/08 (2006.01); H03M 1/56 (2006.01);
U.S. Cl.
CPC ...
H03M 1/56 (2013.01); H03M 1/0675 (2013.01); H03M 1/0836 (2013.01); H03M 1/0854 (2013.01);
Abstract

A column-parallel dual-gain single-slope ADC comprises an input for receiving a signal V, a sample-and-hold stage which receives Vand outputs sampled signal V, a comparator, a counter, and a ramp generator which generates high-gain (HG) and low-gain (LG) ramps, with the ratio of the LG ramp slope to the HG ramp slope being greater than 1. During a coarse conversion phase, Vis compared with a threshold voltage V, and a flag is set to a first or second state depending on the comparison. During a fine conversion phase, if the flag is in the first state, the HG ramp is provided to the comparator and its output toggles when the ramp voltage becomes equal to V. If the flag is in the second state, the LG ramp is provided to the comparator and its output toggles when the LG ramp voltage becomes equal to V.


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