The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 2019
Filed:
Apr. 09, 2018
Eta Compute, Inc., Westlake Village, CA (US);
Chao Xu, Thousand Oaks, CA (US);
Gopal Raghavan, Thousand Oaks, CA (US);
Ben Wiley Melton, Thousand Oaks, CA (US);
Vidura Manu Wijayasekara, Thousand Oaks, CA (US);
Bryan Garnett Cope, Austin, TX (US);
David Cureton Baker, Austin, TX (US);
John Whitaker Havlicek, Thousand Oaks, CA (US);
Eta Compute, Inc., Westlake Village, CA (US);
Abstract
There is disclosed a self-timed processor. The self-timed processor includes a plurality of functional blocks comprising null convention logic. Each of the functional blocks outputs one or more multi-rail data values. A global acknowledge tree generates a global acknowledge signal provided to all of the plurality of functional blocks. The global acknowledge signal switches to a first state when all of the multi-rail data values output from the plurality of functional blocks are in respective valid states, and the global acknowledge signal switches to a second state when all of the multi-rail data values output from the plurality of functional blocks are in a null state.