The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Jul. 27, 2018
Applicant:

Navitas Semiconductor, Inc., El Segundo, CA (US);

Inventors:

Thomas Ribarich, Laguna Beach, CA (US);

Ju Zhang, Monterey Park, CA (US);

Assignee:

Navitas Semiconductor, Inc., El Segundo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/217 (2006.01); H03K 17/082 (2006.01); H03K 9/08 (2006.01); H03K 17/06 (2006.01); H03K 17/691 (2006.01); H03K 17/62 (2006.01);
U.S. Cl.
CPC ...
H03K 17/0822 (2013.01); H02M 7/217 (2013.01); H03K 9/08 (2013.01); H03K 17/063 (2013.01); H03K 17/6235 (2013.01); H03K 17/691 (2013.01);
Abstract

A power drive circuit is disclosed. The power circuit includes: a pulse detector, configured to generate first and second control signals in response to first and second pulse signals, respectively. The power drive circuit also includes a state storage device, configured to generate first and second driver input signals in response to the first and second control signals, respectively. The power drive circuit also includes a driver configured to generate first and second gate drive signals in response to the first and second driver input signals, respectively. The power drive circuit also includes a power switch, configured to receive the first and second gate drive signals, where the first and second gate drive signals control the power switch to selectively conduct or not conduct current between first and second terminals.


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