The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Dec. 21, 2017
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Hiroyuki Nakamura, Tokyo, JP;

Hiroya Shimoyama, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 23/495 (2006.01); H01L 23/04 (2006.01); H01L 31/111 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 27/06 (2006.01); H01L 29/66 (2006.01); H02M 7/00 (2006.01); H02M 7/537 (2006.01); H02P 27/06 (2006.01); B62D 5/04 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); B62D 5/0406 (2013.01); H01L 23/3135 (2013.01); H01L 23/49524 (2013.01); H01L 23/49541 (2013.01); H01L 23/49562 (2013.01); H01L 24/09 (2013.01); H01L 24/49 (2013.01); H01L 25/0655 (2013.01); H01L 27/0629 (2013.01); H01L 29/66992 (2013.01); H02M 7/003 (2013.01); H02M 7/537 (2013.01); H02P 27/06 (2013.01); H01L 23/3107 (2013.01); H01L 23/3121 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/09165 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/49179 (2013.01);
Abstract

The semiconductor device of the present invention is a semiconductor device in which a first semiconductor chip including a first field effect transistor for a high-side switch, a second semiconductor chip including a second field effect transistor for a low-side switch, and a third semiconductor chip including a circuit that controls each of the first and second semiconductor chips are sealed with a sealing portion. A lead electrically connected to a pad of the first semiconductor chip for a source of the first field effect transistor and a lead electrically connected to a back-surface electrode of the second semiconductor chip for a drain of the second field effect transistor are disposed on the same side of the sealing portion in a plan view.


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