The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Dec. 19, 2017
Applicant:

Qromis, Inc., Santa Clara, CA (US);

Inventors:

Vladimir Odnoblyudov, Danville, CA (US);

Dilip Risbud, San Jose, CA (US);

Ozgur Aktas, Pleasanton, CA (US);

Assignee:

Qromis, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/683 (2006.01); H01L 29/66 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02505 (2013.01); H01L 21/0242 (2013.01); H01L 21/0243 (2013.01); H01L 21/0245 (2013.01); H01L 21/0254 (2013.01); H01L 21/02389 (2013.01); H01L 21/02488 (2013.01); H01L 21/02516 (2013.01); H01L 21/6831 (2013.01); H01L 21/7806 (2013.01); H01L 29/66212 (2013.01); H01L 29/66522 (2013.01); H01L 29/66712 (2013.01); H01L 21/02378 (2013.01);
Abstract

A method of forming a semiconductor device includes providing an engineered substrate. The engineered substrate includes a polycrystalline ceramic core, a barrier layer encapsulating the polycrystalline ceramic core, a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer. The method further includes forming a Schottky diode coupled to the engineered substrate. The Schottky diode has a top surface and a bottom surface. The bottom surface is coupled to the substantially single crystalline silicon layer. The method further includes forming a Schottky contact coupled to the top surface of the Schottky diode, forming a metal plating coupled to the Schottky contact, removing the engineered substrate to expose the bottom surface of the Schottky diode, and forming an ohmic contact on the bottom surface of the Schottky diode.


Find Patent Forward Citations

Odnoblyudov, Vladimir. (2019). Method and system for vertical power devices (U.S. Patent No. 10204778). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10204778

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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