The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Aug. 02, 2017
Applicant:

Wave Computing, Inc., Campbell, CA (US);

Inventor:

Christopher John Nicol, Campbell, CA (US);

Assignee:

Wave Computing, Inc., Campbell, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01); H01L 25/00 (2006.01); G06F 7/38 (2006.01); G06F 5/08 (2006.01); G06F 9/4401 (2018.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
G06F 5/085 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 9/4418 (2013.01); H03K 19/017581 (2013.01); H03K 19/1776 (2013.01); H03K 19/17764 (2013.01);
Abstract

Techniques are disclosed for power conservation. A plurality of processing elements and a plurality of instructions are configured. The plurality of processing elements is controlled by instructions contained in a plurality of circular buffers. The plurality of processing elements can comprise a dataflow processor. A first processing element, from the plurality of interconnected processing elements, is set into a sleep state by a first instruction from the plurality of instructions. The first processing element is woken from the sleep state as a result of valid data being presented to the first processing element. A subsection of the plurality of interconnected processing elements is also set into a sleep state based on the first processing element being set into a sleep state. At least one circular buffer from the plurality of circular buffers remains awake while the first processing element is in the sleep state, and the at least one circular buffer provides for data steering through a reconfigurable fabric.


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