The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

Jan. 12, 2018
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Hrvoje Jasa, Scarborough, ME (US);

Tyler Daigle, Scarborough, ME (US);

Andrew Jordan, Scarborough, ME (US);

Gregory Maher, Cape Elizabeth, ME (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/06 (2006.01); H03M 3/00 (2006.01); H03M 1/74 (2006.01); H04B 15/02 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0665 (2013.01); H03M 1/0673 (2013.01); H03M 1/664 (2013.01); H03M 1/74 (2013.01); H03M 3/464 (2013.01); H03M 3/502 (2013.01); H04B 15/02 (2013.01);
Abstract

In a general aspect, an apparatus can include a signal analyzer configured to analyze a signal associated with a processing pipeline, and a dynamic element matching (DEM) selection module configured to select a DEM algorithm from a plurality of DEM algorithms based on the analysis performed by the signal analyzer. The apparatus can include a set of circuit elements where each circuit element from the set of circuit elements has the same logical configuration, and a circuit element selection module configured to select a subset of the set of circuit elements based on the selected DEM algorithm.


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