The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

Oct. 13, 2017
Applicant:

Honeywell International Inc., Morris Plains, NJ (US);

Inventors:

Ali Mohammadpour, Torrance, CA (US);

Andrew Love, Marina Del Ray, CA (US);

Louis Pu, Torrance, CA (US);

Mike Guidry, Redondo Beach, CA (US);

Assignee:

Garrett Transportation I Inc., Torrance, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02P 27/04 (2016.01); H02P 27/06 (2006.01); H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H02P 27/06 (2013.01); H05K 1/111 (2013.01); H05K 1/144 (2013.01); H05K 1/181 (2013.01); H05K 2201/042 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10166 (2013.01); H05K 2201/10272 (2013.01); H05K 2201/10522 (2013.01);
Abstract

Electrical systems and devices with substrate interconnections having reduced parasitic inductance are provided. A first substrate includes one or more capacitors and plurality of connection interfaces, wherein a first subset of connection interfaces electrically connected to a first reference voltage are interleaved with a second subset of connection interfaces electrically connected to a different reference voltage. A second substrate includes a third subset of connection interfaces are electrically connected to a first terminal of a first switching element and the first subset of connection interfaces and a fourth subset of connection interfaces electrically connected to a second terminal of a second switching element and the second subset of connection interfaces, and the third subset and the fourth subset are also interleaved.


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Mohammadpour, Ali. (2019). Electrical systems having interleaved dc interconnects (U.S. Patent No. 10199977). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10199977

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