The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2019
Filed:
Oct. 13, 2016
Aptiv Technologies Limited, St. Michael, BB;
George J. Purden, Westlake Village, CA (US);
Shawn Shi, Thousand Oaks, CA (US);
David W. Zimmerman, Noblesville, IN (US);
APTIV TECHNOLOGIES LIMITED, , BB;
Abstract
A ball-grid-array printed-circuit-board assembly includes a die, a plurality of solder-balls, a substrate, a top-metal layer, and a bottom-metal layer. The die includes a signal-out-pad and a plurality of ground-pads arranged about the signal-out-pad. The top-metal layer, a plurality of vias in the substrate, and the bottom-metal layer cooperate to form a substrate-integrated-waveguide. The top-metal layer is configured to define a U-shaped-slot between a signal-portion of the top-metal layer aligned with the signal-out-pad and the substrate-integrated-waveguide, and a ground-portion of the top-metal layer aligned with the plurality of ground-pads. The U-shaped-slot is characterized by a slot-length that is selected based on the frequency of a signal, and a slot-width that is selected based on the via-height such that the signal generates an electric field directed across the U-shaped-slot whereby the signal is propagated from the signal-portion of the top-metal layer into the substrate-integrated-waveguide.