The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2019
Filed:
Jul. 11, 2017
Applicant:
Taiyo Yuden Co., Ltd., Tokyo, JP;
Inventors:
Assignee:
TAIYO YUDEN CO., LTD., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 41/23 (2013.01); H01L 41/053 (2006.01); H03H 9/25 (2006.01); H01L 41/312 (2013.01); H03H 3/08 (2006.01); H01L 41/047 (2006.01); H01L 41/29 (2013.01); H03H 3/02 (2006.01); H03H 9/05 (2006.01); H01L 41/187 (2006.01); H03H 9/145 (2006.01);
U.S. Cl.
CPC ...
H01L 41/23 (2013.01); H01L 41/0475 (2013.01); H01L 41/0533 (2013.01); H01L 41/29 (2013.01); H01L 41/312 (2013.01); H03H 3/02 (2013.01); H03H 3/08 (2013.01); H03H 9/059 (2013.01); H03H 9/0523 (2013.01); H03H 9/25 (2013.01); H01L 41/1873 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/97 (2013.01); H03H 9/14541 (2013.01);
Abstract
A method of fabricating an electronic device, the method including: arranging a device chip with no bump located on a lower surface of the device chip on a mounting substrate including a bump located on an upper surface of the mounting substrate; and bonding a pad located on the lower surface of the device chip and the bump by applying an ultrasonic wave to the device chip from an upper surface of the device chip.