The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

Nov. 29, 2010
Applicants:

David Clarke, Patrickswell, IE;

Paul Daly, New Castle, IE;

Patrick Mcguinness, Pallaskenry, IE;

Bernard Stenson, County Limerick, IE;

Anne Deignan, Manister, IE;

Inventors:

David Clarke, Patrickswell, IE;

Paul Daly, New Castle, IE;

Patrick McGuinness, Pallaskenry, IE;

Bernard Stenson, County Limerick, IE;

Anne Deignan, Manister, IE;

Assignee:

ANALOG DEVICES, INC., Norwood, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/60 (2006.01); H01L 29/735 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/735 (2013.01); H01L 23/60 (2013.01); H01L 27/0259 (2013.01);
Abstract

An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.


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