The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

Jan. 18, 2016
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventors:

Steven Affleck, Fort Collins, CO (US);

Jerome Beckmann, Loveland, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/06 (2006.01); G11C 7/12 (2006.01); G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/227 (2013.01); G11C 7/065 (2013.01); G11C 7/12 (2013.01); G11C 7/222 (2013.01); G11C 17/18 (2013.01);
Abstract

A computer memory system, delay calibration circuit, and method of operating a delay calibration circuit are provided. The disclosed method includes providing a delay-line ring oscillator on silicon of a chip, providing at least one counter on the silicon of the chip, and measuring a chip-specific delay for performing an operation with the chip by synchronizing the at least one counter and operation of the delay-line ring oscillator with a timing trigger.


Find Patent Forward Citations

Affleck, Steven. (2019). Automatic delay-line calibration using a replica array (U.S. Patent No. 10199082). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10199082

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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