The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

May. 18, 2015
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;

Inventors:

Xuebing Jiang, Beijing, CN;

Lin Lin, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1339 (2006.01); G02F 1/1335 (2006.01); G02F 1/1362 (2006.01); G02F 1/1345 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1339 (2013.01); G02F 1/1345 (2013.01); G02F 1/133514 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); H01L 27/1262 (2013.01); G02F 2001/136295 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01);
Abstract

The present disclosure provides an array substrate, a display panel, manufacturing methods thereof and a display device. The array substrate includes a display region and a non-display region. The non-display region includes a sealant region arranged at a periphery of the display region and a peripheral region arranged at a periphery of the sealant region. The array substrate further includes a plurality of signal connection lines for connecting driving lines. The signal connection lines include a first connection line, a portion of which is arranged at the peripheral region and another portion of which is arranged at the sealant region.


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