The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Feb. 24, 2016
Toshiba Memory Corporation, Minato-ku, Tokyo, JP;
Yasuyuki Eguchi, Kawasaki Kanagawa, JP;
TOSHIBA MEMORY CORPORATION, Tokyo, JP;
Abstract
According to one embodiment, a memory system comprises a memory array, a first ECC control circuit, and a second ECC control circuit. The memory cell array stores data, a first parity generated in association with the data based on a first error correction code (ECC) scheme, and a second parity generated in association with the data and the first parity based on a second error correction code (ECC) scheme. The first ECC control circuit executes error correction using the first ECC scheme and the first parity during a read operation on the memory cell array. The second ECC control circuit executes error correction using the second ECC scheme and the second parity during a scrub operation on the memory cell array. The first ECC scheme and the second ECC scheme have error correction capabilities of different levels.