The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Aug. 10, 2018
Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Rajasekhar Nagulapalli, Northampton, GB;

Simon Forey, Northamptonshire, GB;

Parmanand Mishra, Cupertino, CA (US);

Assignee:

INPHI CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03G 3/30 (2006.01); H03F 3/45 (2006.01); H03F 3/193 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H03G 3/3042 (2013.01); H03F 3/193 (2013.01); H03F 3/45179 (2013.01); H04L 25/03012 (2013.01); H04L 25/03878 (2013.01); H03F 2203/45151 (2013.01); H03F 2203/45156 (2013.01); H04L 2025/03445 (2013.01); H04L 2025/03535 (2013.01);
Abstract

The present invention is directed to electrical circuits. More specifically, embodiments of the presentation provide a CTLE module that includes a two compensation sections. A high-frequency zero RC section is in the source of the differential pair and close to the bias current source. A low-frequency zero section is coupled to an output terminal and configured outside the input signal path. A DC gain tuning section is coupled to the low-frequency zero section. There are other embodiments as well.


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