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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10192907 B1

PDFFull Text
Date of Patent:
Jan. 29, 2019

Filed:

Mar. 14, 2016

Array substrate and manufacturing method thereof, display panel and display device

Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventor:

Seungjin Choi, Beijing, CN;

Assignee:

BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;

Attorneys:

Dilworth & Barrese, LLP

Michael J. Musella, Esq.

Primary Examiner:

Ida M Soward

Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/38 (2006.01); H01L 29/45 (2006.01); H01L 21/10 (2006.01); H01L 21/30 (2006.01); H01L 51/44 (2006.01); H01L 51/52 (2006.01); H01L 51/00 (2006.01); H01L 33/42 (2010.01); H01L 33/00 (2010.01); H01L 31/02 (2006.01); H01L 31/18 (2006.01); H01L 21/77 (2017.01); H01L 21/027 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 21/0274 (2013.01); H01L 21/77 (2013.01); H01L 27/12 (2013.01); H01L 27/124 (2013.01); H01L 27/1262 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01);
Abstract

An array substrate and manufacturing method thereof, display panel and display device. The manufacturing method of the array substrate includes: forming, on a substrate, a first conductive pattern, a second conductive pattern and an insulating pattern, the insulating pattern at least covering an upper surface of the first conducting pattern, the first conductive pattern including a first amorphous transparent conductive pattern and a first metal pattern, and the second conductive pattern including a second amorphous transparent conductive pattern; and performing an annealing treatment to convert the first amorphous transparent conductive pattern and the second amorphous transparent conductive pattern to a first crystalline transparent conductive pattern and a second crystalline transparent conductive pattern respectively. The method addresses the problem in which a metal surface is readily oxidizable when performing an annealing treatment, thereby improving the product yield.

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