The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Jan. 17, 2017
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong, CN;

Inventors:

Wei Zhao, Guangdong, CN;

Xiangyang Xu, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/3065 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 21/0262 (2013.01); H01L 21/3065 (2013.01); H01L 27/1214 (2013.01); H01L 27/1222 (2013.01); H01L 27/1259 (2013.01);
Abstract

The present disclosure relates to a manufacturing method of array substrates, wherein a second masking process forming an active layer, a source electrode and a drain electrode further includes: forming a semiconductor thin-film layer, N+ doping thin-film layer, a metal thin-film layer, and a photo-resistor layer on a gate insulation layer in sequence; applying a gray-tone-mask process to expose and develop the photo-resistor layer to obtain a first photo-resistor mask; applying a first wet etching process and a first dry etching process to etch the metal thin-film layer, the semiconductor thin-film layer, and the N+ doping thin-film layer; applying a plasma ashing process to the first photo-resistor mask to obtain a second photo-resistor mask; applying a second wet etching process to etch the metal thin-film layer; and peeling off the second photo-resistor mask, applying a second dry etching process to etch the N+ doping thin-film layer. The present disclosure also relates to the array substrate formed by the above manufacturing method and the display device having the array substrate.


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