The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Jul. 11, 2018
Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;
Yoshinori Miyaki, Kanagawa, JP;
Masaru Yamada, Kanagawa, JP;
Renesas Electronics Corporation, Tokyo, JP;
Abstract
To enhance reliability in assembling a semiconductor device. There is provided a wiring substrate including a target mark, which is not provided on an extension line of a dicing region provided between a first semiconductor device region and a second semiconductor device region but is provided between the extension line of the dicing region and a first imaginary extension line of a first outermost peripheral land row and between the extension line of the dicing region and a second imaginary extension line of a second outermost peripheral land row. Furthermore, after mounting a semiconductor chip, wire bonding is performed, resin sealing is performed and a solder ball is mounted. After that, the dicing region is specified on the basis of the target mark, and the wiring substrate is cut along the dicing region.