The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Dec. 20, 2017
Nxp B.v., Eindhoven, NL;
Chung Hsiung Ho, Kaohsiung, TW;
Wayne Hsiao, Kaohsiung, TW;
Richard Te Gan, Chandler, AZ (US);
James Raymond Spehar, Chandler, AZ (US);
NXP B.V., San Jose, CA (US);
Abstract
A wafer-level chip-scale package (WLCSP) includes an integrated circuit (IC) chip, and die bonding pads with a redistribution layer (RDL) having multiple via structures located directly below the footprint of a solder ball placed on the bonding pad. The via structures electrically connect the solder ball to a top metal layer of the IC chip. The RDL may extend beyond the solder ball's footprint and have additional vias that connect to the top metal layer, including vias located under and connected to other solder balls. The bonding pads have a low R-on resistance and are not susceptible to thermal-induced cracking.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile