The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Dec. 19, 2017
Applicant:

Toyoda Gosei Co., Ltd., Kiyosu-shi, JP;

Inventor:

Koji Okuno, Kiyosu, JP;

Assignee:

TOYODA GOSEI CO., LTD., Kiyosu-Shi, Aichi-Ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01); H01L 23/482 (2006.01); H01L 27/15 (2006.01); H01L 33/32 (2010.01); H01L 33/62 (2010.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01); H01L 21/764 (2006.01); H01L 21/768 (2006.01); H01L 27/085 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4821 (2013.01); H01L 21/764 (2013.01); H01L 21/76885 (2013.01); H01L 27/085 (2013.01); H01L 27/156 (2013.01); H01L 29/2003 (2013.01); H01L 29/7787 (2013.01); H01L 33/32 (2013.01); H01L 33/62 (2013.01); H01L 2933/0066 (2013.01);
Abstract

There are provided a semiconductor array and a method for producing a micro device, in which the semiconductor laminate used in the micro device can be readily separated from the substrate. The semiconductor array includes a substrate, a bridging portion bridged to the substrate, a plurality of semiconductor laminates arranged on the bridging portion, and first voids defined by the substrate and the bridging portion. The bridging portion has a plurality of through holes formed at least one of the leg portion and the top portion. The first void communicates with the outside of the semiconductor array via the through holes. Each of the semiconductor laminates is in direct contact with each of the top portions.


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