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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10192784 B1

PDFFull Text
Date of Patent:
Jan. 29, 2019

Filed:

Feb. 22, 2018

Three-dimensional memory device containing self-aligned contact via structures and methods of manufacturing the same

Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Zhixin Cui, Yokkaichi, JP;

Hiroshi Minakata, Yokkaichi, JP;

Keigo Kitazawa, Yokkaichi, JP;

Yoshiyuki Okura, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:

The Marbury Law Group PLLC

Primary Examiner:

Jarrett J Stark

Int. Cl.
CPC ...
H01L 27/11524 (2017.01); H01L 21/768 (2006.01); H01L 27/11556 (2017.01); H01L 27/11529 (2017.01); H01L 27/11519 (2017.01); H01L 27/11582 (2017.01); H01L 27/11573 (2017.01); H01L 27/11565 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/1157 (2017.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/76816 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 27/11573 (2013.01); H01L 27/11582 (2013.01);
Abstract

An alternating stack of insulating layers and sacrificial material layers including stepped surfaces is formed over a substrate. After formation of a retro-stepped dielectric material portion over the stepped surfaces, an array of cylindrical openings is formed through the retro-stepped dielectric material portion and the alternating stack. A continuous cavity is formed by isotropically etching the insulating layers and the retro-stepped dielectric material portion selective to the sacrificial material layers. Remaining portions of the retro-stepped dielectric material portion include dielectric pillar structures. A continuous fill material portion is formed in the continuous cavity. Memory stack structures are formed through the alternating stack. The sacrificial material layers and the dielectric pillar structures are replaced with combinations of an electrically conductive layer and a contact via structure. The contact via structures are self-aligned to the electrically conductive layers.

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Cui, Zhixin. (2019). Three-dimensional memory device containing self-aligned contact via structures and methods of manufacturing the same (U.S. Patent No. 10192784). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10192784

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