The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Jan. 30, 2018
Applicant:
Attopsemi Technology Co., Ltd, Hsinchu, TW;
Inventor:
Shine C. Chung, San Jose, CA (US);
Assignee:
Attopsemi Technology Co., LTD, Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); G11C 17/16 (2006.01); H01L 27/092 (2006.01); G11C 11/16 (2006.01); H01L 27/24 (2006.01); H01L 27/22 (2006.01); H01L 27/12 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0004 (2013.01); G11C 11/1659 (2013.01); G11C 11/1675 (2013.01); G11C 13/0002 (2013.01); G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0011 (2013.01); G11C 13/0028 (2013.01); G11C 13/0069 (2013.01); G11C 17/16 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 27/224 (2013.01); H01L 27/228 (2013.01); H01L 27/2409 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 27/2472 (2013.01); H01L 45/1253 (2013.01); G11C 2013/0073 (2013.01); G11C 2213/72 (2013.01); G11C 2213/74 (2013.01); H01L 45/04 (2013.01); H01L 45/06 (2013.01); H01L 45/085 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01);
Abstract
An One-Time Programmable (OTP) memory is built in at least one of semiconductor fin structures. The OTP memory has a plurality of OTP cells. At least one of the OTP cells can have at least one resistive element and at least one fin. The at least one resistive element can be built by an extended source/drain or a MOS gate. The at least one fin can be built on a common well or on an isolated structure that has at least one MOS gate dividing fins into at least one first active region and a second active region.