The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Oct. 18, 2017
Applicant:
Cypress Semiconductor Corporation, San Jose, CA (US);
Inventors:
Rishi Agarwal, Irvine, CA (US);
Nicholas Alexander Bodnaruk, Sunnyvale, CA (US);
Assignee:
Cypress Semiconductor Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/22 (2006.01); G06F 13/40 (2006.01); G06F 13/38 (2006.01); G06F 13/42 (2006.01); H02J 7/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/263 (2013.01); G06F 1/22 (2013.01); G06F 1/266 (2013.01); G06F 1/3287 (2013.01); G06F 13/38 (2013.01); G06F 13/385 (2013.01); G06F 13/40 (2013.01); G06F 13/4282 (2013.01); H02J 2007/0062 (2013.01);
Abstract
Techniques for low-power USB Type-C receivers with high DC-level shift tolerance are described herein. In an example embodiment, a USB-enabled device comprises a receiver circuit coupled to a Configuration Channel (CC) line of a USB Type-C subsystem. The receiver circuit is configured to receive data from an incoming signal on the CC line even when the incoming signal has more than 250 mV of DC offset with respect to local ground, and to operate in presence of a VBUS charging current that is specified in a USB-PD specification.