The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Nov. 17, 2016
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Shin Kamei, Atsugi, JP;

Makoto Jizodo, Atsugi, JP;

Kotaro Takeda, Atsugi, JP;

Hiroshi Fukuda, Atsugi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01M 11/00 (2006.01); G02B 6/124 (2006.01); G02B 6/122 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G01M 11/33 (2013.01); G02B 6/124 (2013.01); G02B 6/12007 (2013.01); G02B 6/1228 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/12107 (2013.01); G02B 2006/12138 (2013.01); G02B 2006/12147 (2013.01); G02B 2006/12164 (2013.01);
Abstract

The visual detection of a silicon optical circuit in a conventional technique depends on sensory decision by a human who visually conducts checking, and there has been limitation in completely detecting small flaws. The optical circuit of the present invention includes, in addition to an optical circuit that implements desired functions, an optical waveguide for flaw detection which surrounds the entire optical circuit and which is sufficiently proximate to the optical waveguide of the optical circuit and grating couplers connected to the optical waveguide for detection. Based on the transmission characteristic measurement of the optical waveguide for detection using the grating couplers, a flaw within each chip can be efficiently discovered in the state of a wafer before being cut into chips. A flaw can also be discovered hierarchically by providing individual optical waveguides for detection for respective chips and by further forming one common optical waveguide for detection over the plurality of chips.


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