The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2019
Filed:
Jul. 23, 2018
Applicant:
Ciena Corporation, Hanover, MD (US);
Inventors:
Sadok Aouini, Quebec, CA;
Naim Ben-Hamida, Ottawa, CA;
Christopher Kurowski, Ottawa, CA;
Lukas Jakober, Ottawa, CA;
Assignee:
Ciena Corporation, Hanover, MD (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03L 7/06 (2006.01); H03L 7/08 (2006.01); H04B 10/40 (2013.01); H04L 7/033 (2006.01); H04L 25/49 (2006.01); H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); H03L 7/00 (2013.01); H03L 7/06 (2013.01); H04B 10/40 (2013.01); H03L 7/0807 (2013.01); H03L 2207/00 (2013.01); H03L 2207/06 (2013.01); H03L 2207/18 (2013.01);
Abstract
A method for clock recovery that may include obtaining an output signal from a phase locked loop (PLL) device. The method may further include determining, using a digital phase detector, the output signal, and a transmitter clock signal, an amount of phase difference between the output signal and the transmitter clock signal. The method may further include filtering, using a phase rotator and a digital accumulator, a portion of the amount of phase difference from the output signal to generate a filtered signal.