The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2019

Filed:

Jan. 04, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Kyungseok Min, Yongin-si, KR;

Sung Dae Suk, Seoul, KR;

JeongYun Lee, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1033 (2013.01); H01L 29/0649 (2013.01); H01L 29/41775 (2013.01); H01L 29/7833 (2013.01);
Abstract

A semiconductor device includes a device isolation layer on a substrate, a first active pattern defined by the device isolation layer, and source/drain regions. The first active pattern extends in a first direction and includes a channel region between a pair of recesses formed at an upper portion of the first active pattern. The source/drain regions fill the pair of recesses in the first active pattern. Each of the source/drain regions include a first semiconductor pattern in the recess and a second semiconductor pattern on the first semiconductor pattern. The source/drain region have an upper portion whose width is less than a width of its lower portion. The second semiconductor pattern has an upper portion whose width is less than a width of its lower portion. The upper portion of the second semiconductor pattern is positioned higher than a top surface of the channel region.


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