The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2019

Filed:

Jan. 18, 2017
Applicant:

Oracle International Corporation, Redwood Shores, CA (US);

Inventors:

Kiran Kishore Vedantam, Santa Clara, CA (US);

Aparna Ramachandran, Cupertino, CA (US);

James Ballard, Palo Alto, CA (US);

Mark Russell O'brien, Irvine, CA (US);

Sampanna Prashant Pathak, Santa Clara, CA (US);

Assignee:

Oracle International Corporation, Redwood Shores, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 17/5077 (2013.01); G06F 2217/78 (2013.01);
Abstract

A method may include obtaining a design including cells and a power grid. The method may further include dividing the design into tiles, determining a voltage budget for a tile, calculating a voltage drop for each cell of the tile based on determining an activity factor for the cell and a peak current consumed by the cell, determining, for each cell of the tile and based on the power grid, an affected vicinity for the cell including one or more neighboring cells affected by a current drawn on the cell, determining an affected vicinity for the tile based on the affected vicinity for each cell of the subset, calculating a voltage drop for the tile based on the voltage drop for each cell of the affected vicinity for the tile, and detecting a voltage deviation when a difference between the voltage budget and the voltage drop exceeds a threshold.


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