The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

Feb. 27, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventor:

Takashi Toi, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/033 (2006.01); H03K 5/24 (2006.01); H03K 3/021 (2006.01); H04L 25/03 (2006.01); H04L 25/49 (2006.01); H03K 3/03 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); H03K 3/021 (2013.01); H03K 5/24 (2013.01); H04L 7/0334 (2013.01); H04L 25/03878 (2013.01); H04L 25/4917 (2013.01); H03K 3/0315 (2013.01);
Abstract

A semiconductor integrated circuit includes a clock recovery circuit that receive a multi-level pulse-amplitude modulated signal and to recover a clock signal. The clock recovery circuit includes a generation circuit and an oscillator. The generation circuit includes a plurality of comparators and pulse generators and a pulse summing circuit. The plurality of comparators and pulse generators compare the multi-level pulse-amplitude modulated signal with a plurality of threshold values to generate a plurality of pulses according to a plurality of comparison results. The pulse summing circuit generates a synthetic pulse based on the generated plurality of pulses. The oscillator oscillates in synchronization with the synthetic pulse to generate the clock signal.


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