The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2019
Filed:
Sep. 21, 2016
Fractional-n phase locked loop delta sigma modulator noise reduction using charge pump interpolation
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Jingcheng Zhuang, San Diego, CA (US);
Xinhua Chen, San Diego, CA (US);
Frederic Bossu, San Diego, CA (US);
Yiwu Tang, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/087 (2006.01); H03L 7/099 (2006.01); H03L 7/197 (2006.01); H04L 7/033 (2006.01); H03L 7/089 (2006.01); H03L 7/191 (2006.01);
U.S. Cl.
CPC ...
H03L 7/087 (2013.01); H03L 7/0898 (2013.01); H03L 7/099 (2013.01); H03L 7/191 (2013.01); H03L 7/1974 (2013.01); H04L 7/033 (2013.01); H03L 7/1976 (2013.01);
Abstract
A phase locked loop has a frequency divider included in a feedback path. The frequency divider generates a first output and a delayed output. The phase locked loop also includes a charge pump to generate an output current based on the first output and the delayed output of the frequency divider.