The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2019
Filed:
Dec. 20, 2016
Applicant:
Seiko Epson Corporation, Tokyo, JP;
Inventor:
Takemi Yonezawa, Minowa-machi, JP;
Assignee:
SEIKO EPSON CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/02 (2006.01); H03B 5/36 (2006.01); H03L 1/00 (2006.01); H03L 1/04 (2006.01); H03L 7/085 (2006.01); H03L 7/093 (2006.01); H03L 7/099 (2006.01); H03L 7/14 (2006.01);
U.S. Cl.
CPC ...
H03L 1/025 (2013.01); H03B 5/362 (2013.01); H03B 5/368 (2013.01); H03L 1/00 (2013.01); H03L 1/026 (2013.01); H03L 1/028 (2013.01); H03L 1/04 (2013.01); H03L 7/085 (2013.01); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H03L 7/14 (2013.01); H03B 2200/004 (2013.01); H03B 2200/0018 (2013.01); H03L 2207/50 (2013.01);
Abstract
A circuit device includes a digital interface, a processor, an oscillation signal generation circuit, a clock signal generation circuit that generates a clock signal having frequency obtained through multiplication of a frequency of the oscillation signal, and terminal groups of the digital interface and the clock signal generation circuit. The terminal group of the digital interface is disposed in a first region along a first side of the circuit device, and the terminal group of the clock signal generation circuit is disposed in any one of second, third and fourth regions of the circuit device.