The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

Jul. 25, 2017
Applicant:

Dosilicon Co., Ltd., Shanghai, CN;

Inventor:

Tae Gyoung Kang, Yongin-si, KR;

Assignee:

DOSILICON CO., LTD., Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10826 (2013.01); H01L 27/10805 (2013.01); H01L 27/10814 (2013.01); H01L 27/10855 (2013.01); H01L 27/10873 (2013.01); H01L 27/10879 (2013.01); H01L 27/10888 (2013.01);
Abstract

The fabricating method of a DRAM cell includes forming a facing bar that extends in a direction of the word line; forming a gate of the cell transistor on one side surface of the facing bar; forming a bit line plug that is electrically connected to one side of the transmission channel, which is formed on the one side surface of the facing bar; and forming the storage that is electrically connected to the other side of the transmission channel, which is formed on the horizontal surface of the semiconductor substrate. A pair of DRAM cells shares a facing bar and a bit line plug. In accordance with the present disclosure, a required layout area is significantly reduced.


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