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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10177007 B1

PDFFull Text
Date of Patent:
Jan. 08, 2019

Filed:

Mar. 02, 2018

Method for forming low-temperature polysilicon device and method for planarizing polysilicon layer

Applicant:

Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan, Hubei, CN;

Inventor:

Weibin Zhang, Guangdong, CN;

Assignee:

WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Wuhan, CN;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Roberts P Culbert

Int. Cl.
CPC ...
H01L 21/321 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32115 (2013.01); H01L 21/3065 (2013.01); H01L 21/3081 (2013.01); H01L 21/3085 (2013.01); H01L 21/30604 (2013.01); H01L 21/31133 (2013.01); H01L 21/31138 (2013.01); H01L 21/02667 (2013.01); H01L 29/6675 (2013.01);
Abstract

A method for planarizing a polysilicon layer of a low-temperature polysilicon device is provided. The method includes: Step SCrystallizing the low-temperature polysilicon device. Step SForming a flat coating layer on an uneven surface of the polysilicon layer of the crystallized low-temperature polysilicon device through a coating process. Step SCuring the flat coating layer. Step SRemoving the cured flat coating layer and the polysilicon protrusion through a removing process to form a flat surface of the polysilicon layer. By the foregoing method, the surface of the rough and uneven polysilicon layer can be well-planarized. As a result, the problems of a broken film, unclean etching, or tip discharge, which would be induced by a rough polysilicon layer, are mitigated. Therefore, the production yield of the low-temperature polysilicon device is improved.

Find Patent Forward Citations

Zhang, Weibin. (2019). Method for forming low-temperature polysilicon device and method for planarizing polysilicon layer (U.S. Patent No. 10177007). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10177007

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