The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

May. 12, 2017
Applicant:

Synaptics Incorporated, San Jose, CA (US);

Inventors:

Hirobumi Furihata, Tokyo, JP;

Damien Berget, Sunnyvale, CA (US);

Takashi Nose, Tokyo, JP;

Joseph Kurth Reynolds, San Jose, CA (US);

Assignee:

SYNAPTICS INCORPORATED, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/395 (2006.01); G09G 3/3258 (2016.01); G09G 3/3291 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3258 (2013.01); G09G 3/3291 (2013.01); G09G 5/395 (2013.01); G09G 2300/0439 (2013.01); G09G 2320/0626 (2013.01); G09G 2330/028 (2013.01); G09G 2340/02 (2013.01); G09G 2350/00 (2013.01);
Abstract

A host device divides original data into first to Nstream data for N being an integer of two or more, generates first to Ncompressed stream data by sequentially compressing the first to Nstream data with a variable length compression, divides the first to Ncompressed stream data into fixed-length blocks, and sequentially transmits the fixed-length blocks to the display driver. The display driver includes a memory storing therein the fixed-length blocks and a decompression circuitry reading out the fixed-length blocks from the memory. The decompression circuitry includes first to Nprocessing circuits. The first to Nprocessing circuits each perform a predetermined process on the fixed-length blocks received to generate processed data. The host device sorts the fixed-length blocks so that the fixed-length blocks are supplied in the order in which the first to Nprocessing circuits require the fixed-length blocks.


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