The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

May. 15, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Ron Keidar, San Diego, CA (US);

Osman Koyuncu, San Diego, CA (US);

Michael Batenburg, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 9/455 (2018.01); G06F 9/50 (2006.01); G06F 21/82 (2013.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 9/45558 (2013.01); G06F 9/5077 (2013.01); G06F 21/82 (2013.01); G06F 13/40 (2013.01); G06F 2009/45579 (2013.01);
Abstract

System and method for providing adaptive access to a hardware block on a computer system. In one embodiment, a method includes receiving a first access request and a second access request with an access controller, wherein the second access request is received sequentially after the first access request, and the first access request includes a first master identification and the second access request includes a second master identification, determining if the second master identification is equal to the first master identification, providing access to the second access request if the second master identification is equal to the first master identification, wherein the first master identification is associated with one or more hardware block interface values, invalidating the one or more hardware block interface values associated with the first master identification if the second master identification is not equal to the first master identification, and associating the one or more hardware block interface values with the second master identification and a corresponding privilege.


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