The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2019
Filed:
Mar. 29, 2014
Applicant:
Empire Technology Development Llc, Wilmington, DE (US);
Inventor:
Yan Solihin, Raleigh, NC (US);
Assignee:
Empire Technology Development LLC, Wilmington, DE (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/0893 (2016.01); G06F 12/0895 (2016.01); G11C 11/406 (2006.01); G06F 1/32 (2006.01); G06F 12/0802 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0893 (2013.01); G06F 12/0895 (2013.01); G11C 11/40607 (2013.01); G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); G06F 12/0802 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/601 (2013.01); G11C 11/406 (2013.01); Y02D 10/13 (2018.01);
Abstract
Techniques described herein generally include methods and systems related to dynamic cache-sizing used to reduce the energy consumption of a DRAM cache in a chip multiprocessor. Dynamic cache sizing may be performed by adjusting the refresh interval of a DRAM cache or by combining way power-gating of the DRAM cache with adjusting the refresh interval.