The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Feb. 07, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Kyung-seok Song, Busan, KR;

Byoung-joo Yoo, Seoul, KR;

Chang-kyung Seong, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/04 (2006.01); H04L 7/033 (2006.01); H03L 7/081 (2006.01); H03L 7/08 (2006.01); H04L 7/00 (2006.01); H03L 7/07 (2006.01); H03K 5/131 (2014.01);
U.S. Cl.
CPC ...
H03L 7/0818 (2013.01); H03L 7/07 (2013.01); H03L 7/0807 (2013.01); H03L 7/0814 (2013.01); H04L 7/0025 (2013.01); H04L 7/0037 (2013.01); H04L 7/0087 (2013.01); H04L 7/0331 (2013.01); H03K 5/131 (2013.01);
Abstract

A phase interpolator includes a control circuit configured to generate a selection control signal that corresponds to a selected coarse phase interval, and generate a weight setting signal for generating a phase interpolation clock signal with an interpolated phase within the coarse phase interval; a phase selector configured to receive a plurality of inversion delay clock signal pairs, select at least two inversion delay clock signal pairs from the plurality of inversion delay clock signal pairs based on the selection control signal, select and output a selection delay clock signal pair corresponding to the coarse phase interval from the selected at least two inversion delay clock signal pairs; and a phase mixer configured to receive the selection delay clock signal pair from the phase selector and generate the phase interpolation clock signal based on the weight setting signal.


Find Patent Forward Citations

Song, Kyung-seok. (2019). Phase interpolator for interpolating phase of delay clock signal and device including the same and for performing data sampling by using phase interpolated clock signal (U.S. Patent No. 10171091). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10171091

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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