The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Jan. 25, 2017
Applicant:

Skyworks Solutions, Inc., Woburn, MA (US);

Inventors:

Florinel G. Balteanu, Irvine, CA (US);

Jakub F. Pingot, Ottawa, CA;

Peter Harris Robert Popplewell, Ottawa, CA;

Assignee:

SKYWORKS SOLUTIONS, INC., Woburn, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); G05F 1/56 (2006.01); G05F 3/24 (2006.01); H03F 3/189 (2006.01); H03F 3/20 (2006.01); H04B 1/40 (2015.01); G05F 3/26 (2006.01); H01L 21/8234 (2006.01); H01L 23/528 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); G05F 1/56 (2013.01); G05F 3/242 (2013.01); G05F 3/262 (2013.01); H01L 21/823475 (2013.01); H01L 23/528 (2013.01); H01L 27/0629 (2013.01); H03F 3/189 (2013.01); H03F 3/20 (2013.01); H04B 1/40 (2013.01); Y10T 29/41 (2015.01);
Abstract

Methods for fabricating an integrated circuit with a voltage regulator are provided. In some implementations, a method includes forming a primary regulator on a semiconductor substrate, including fabricating a switch, fabricating an amplifier for controlling the switch, and fabricating a voltage generator for biasing the amplifier to operate the primary regulator in a bypass mode or in a regulating mode. The method further includes forming an input terminal and an output terminal of the primary regulator on the semiconductor substrate, forming a secondary regulator on the substrate, forming an input terminal and an output terminal of the secondary regulator on the semiconductor substrate, and forming an electrical connection between the output terminal of the primary regulator and the input terminal of the secondary regulator.


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