The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Oct. 06, 2016
Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Makoto Nakazawa, Sakai, JP;

Takatoshi Orui, Sakai, JP;

Shigeyasu Mori, Sakai, JP;

Fumiki Nakano, Sakai, JP;

Kiyoshi Minoura, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/00 (2006.01); H01Q 1/38 (2006.01); H01Q 21/00 (2006.01); H01Q 1/24 (2006.01); H01L 23/34 (2006.01); H01L 23/66 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); H01Q 21/06 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
H01Q 1/38 (2013.01); H01L 23/345 (2013.01); H01L 23/66 (2013.01); H01L 27/124 (2013.01); H01L 27/1222 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 27/1259 (2013.01); H01L 29/7869 (2013.01); H01L 29/78669 (2013.01); H01Q 1/241 (2013.01); H01Q 21/0087 (2013.01); H01Q 21/064 (2013.01); G09G 3/3614 (2013.01); G09G 3/3648 (2013.01); H01L 2223/6677 (2013.01);
Abstract

A TFT substrate () including a plurality of antenna element regions (U) arranged on a dielectric substrate (), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (); a first insulating layer () covering the thin film transistor and having a first opening (CH) which exposes a drain electrode (D) of the thin film transistor (); and a patch electrode () formed on the first insulating layer () and in the first opening (CH), and electrically connected to the drain electrode (D) of the thin film transistor, wherein the patch electrode () includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (S) and the drain electrode (D) of the thin film transistor.


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