The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Oct. 19, 2015
Applicants:

Lite-on Opto Technology (Changzhou) Co., Ltd., Changzhou, Jiangsu, CN;

Lite-on Technology Corporation, Taipei, TW;

Inventors:

Chen-Hsiu Lin, New Taipei, TW;

Tsung-Kang Ying, New Taipei, TW;

Pin-Feng Hung, New Taipei, TW;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/62 (2010.01); H01L 33/52 (2010.01); H01L 33/60 (2010.01); H01L 33/50 (2010.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01L 33/62 (2013.01); H01L 33/505 (2013.01); H01L 33/52 (2013.01); H01L 33/60 (2013.01); H05K 1/0206 (2013.01); H05K 1/0298 (2013.01); H05K 2201/10106 (2013.01);
Abstract

An LED package structure includes a multilayer circuit board, an LED chip, and a cover. The multilayer circuit board has a conductive layer, a first resin layer disposed on the conductive layer, and a first circuit layer disposed on the first resin layer. The first resin layer has a first opening, and a portion of the conductive layer is partially exposed from the first resin layer via the first opening such that a mounting region is exposed. The first circuit layer has a second opening, and the second opening exposes the mounting region. The LED chip is fixed on the mounting region by passing it through the first and second openings, and the LED chip is connected to the first circuit layer by wires. The cover is disposed on the first resin layer and covers the LED chip and the first circuit layer.


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