The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2019
Filed:
Jun. 28, 2017
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventors:
Ki Jun Sung, Cheongju-si, KR;
Rae Hyung Jeong, Seoul, KR;
Assignee:
SK hynix Inc., Icheon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/373 (2006.01); H01L 23/367 (2006.01); H01L 21/321 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/32115 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/3675 (2013.01); H01L 23/3677 (2013.01); H01L 23/3737 (2013.01); H01L 23/5381 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01); H01L 23/562 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 23/3128 (2013.01); H01L 23/3736 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/97 (2013.01); H01L 2924/1432 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1531 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/351 (2013.01); H01L 2924/3511 (2013.01);
Abstract
A semiconductor package may be provided. The semiconductor package may include a first semiconductor chip and a second semiconductor chip disposed on an interconnection layer. The semiconductor package may include a heat transferring block disposed between the first and second semiconductor chips to be mounted on the interconnection layer. Related methods are also provided.