The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2019
Filed:
Jul. 17, 2013
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Yanxiang Liu, Wappingers Falls, NY (US);
Min-hwa Chi, Malta, NY (US);
Assignee:
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26533 (2013.01); H01L 21/823878 (2013.01); H01L 29/1033 (2013.01); H01L 29/1079 (2013.01); H01L 29/4966 (2013.01); H01L 29/6659 (2013.01); H01L 29/66583 (2013.01); H01L 29/7833 (2013.01);
Abstract
There is set forth herein a semiconductor device fabricated on a bulk wafer having a local buried oxide region underneath a channel region of a MOSFET. In one embodiment the local buried oxide region can be self-aligned to a gate, and a source/drain region can be formed in a bulk substrate. A local buried oxide region can be formed in a semiconductor device by implantation of oxygen into a bulk region of the semiconductor device followed by annealing.