The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Jan. 12, 2016
Applicant:

Vanchip (Tianjin) Technology Co., Ltd., Tianjin, CN;

Inventor:

Sheng Lin, Tianjin, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/595 (2006.01); G05F 3/30 (2006.01); H03F 3/217 (2006.01); G05F 1/575 (2006.01); G05F 3/22 (2006.01); G11C 5/14 (2006.01); H03F 1/08 (2006.01);
U.S. Cl.
CPC ...
G05F 3/30 (2013.01); G05F 1/575 (2013.01); G05F 3/222 (2013.01); G11C 5/147 (2013.01); H03F 1/086 (2013.01); H03F 3/217 (2013.01);
Abstract

An adaptive low-dropout regulator (LDO) having a wide voltage endurance range includes a power supply voltage tracker (P), a voltage-current converter (), an error amplifier (), a current mirror circuit (), and a dynamic voltage divider (). One end of the power supply voltage tracker (P) is connected to a V, the other end thereof is connected to the voltage-current converter () connected to an input end of the current mirror circuit (), and an output end of the current mirror circuit () is connected to sources of two input field effect transistors (N, N) in the error amplifier (). Sources of two load field effect transistors (P, P) in the error amplifier () are connected to the V. Dynamic voltage dividers (A,B) are connected respectively between each of the input field effect transistors (N, N) and the corresponding load field effect transistors (P, P).


Find Patent Forward Citations

Lin, Sheng. (2019). Adaptive low-dropout regulator having wide voltage endurance range, chip and terminal (U.S. Patent No. 10168727). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10168727

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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