The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Jul. 25, 2016
Applicant:

Montage Technology (Shanghai) Co., Ltd., Shanghai, CN;

Inventor:

Mingfu Shi, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/10 (2006.01); H03L 7/06 (2006.01); G01R 31/3187 (2006.01); B60T 8/88 (2006.01); H03L 7/081 (2006.01); H03L 7/093 (2006.01); G09G 3/36 (2006.01); H03K 5/1534 (2006.01); H03K 5/15 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1534 (2013.01); H03K 5/15066 (2013.01); H03K 2005/00071 (2013.01);
Abstract

A circuit comprises a cycle-cycle detector, configured to receive a synthesized clock signal, and detect a cycle difference index signal between any two neighboring cycles of the synthesized clock signal, wherein the synthesized clock signal is combined by a plurality of phase shifted signals; a demultiplexer connected to the cycle-cycle detector, configured to convert the cycle difference index signal into a plurality of parallel data signals; and a first state machine, connected to both the demultiplexer and the cycle-cycle detector, configured to generate a tuning signal based on the parallel data signals, and feed the tuning signal back to the cycle-cycle detector; wherein the cycle-cycle detector is further configured to adjust delay time of the synthesized clock signal according to the tuning signal.


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