The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Aug. 14, 2017
Applicant:
Huawei Technologies Co., Ltd., Shenzhen, CN;
Inventors:
Qi Chen, Shenzhen, CN;
Jianfu Zhong, Shenzhen, CN;
Qiuling Zeng, Shanghai, CN;
Yu Xia, Shenzhen, CN;
Assignee:
Huawei Technologies Co., Ltd, Shenzhen, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/012 (2006.01); H03K 5/159 (2006.01);
U.S. Cl.
CPC ...
H03K 3/012 (2013.01); H03K 5/159 (2013.01);
Abstract
A phase-inverted clock generation circuit is provided, where sources of a first PMOS and a second PMOS are connected to a power source, drains of the first PMOS and the second PMOS are connected to a source of a third PMOS, and a drain of the third PMOS is connected to a drain of a third NMOS; and the drain of the third PMOS is connected to a drain of a second NMOS, a source of the second NMOS is connected to a drain of a first NMOS, and a source of the first NMOS and a source of the third NMOS.